Visibl Semiconductors

Problem and Solution Overview

The Problem

Modern semiconductor design is becoming increasingly complex, outpacing the ability of engineering teams to scale headcount proportionally. Designers spend a disproportionate amount of time interpreting ambiguous outputs from disparate EDA tools, stitching together specifications, logs, and scripts, and acting as “human glue” to keep the flow moving. This results in bottlenecks, lower throughput, and higher costs for bringing advanced chips to market.

The Solution

Visibl offers an on‑premises, AI‑native Integrated Development Environment (IDE) that ingests the complete design context—source code, specifications, tool outputs, and scripts—and instantly surfaces the right information. The platform validates each next step against real tool feedback and packages decisions with full traceability, enabling teams to decouple design execution throughput from headcount. By turning compute into design capacity, Visibl aims to accelerate chip delivery while keeping costs linear.

Value Proposition

The AI IDE provides three core benefits:

1. Accelerated Decision‑Making – Designers receive immediate, context‑aware guidance, reducing time spent on manual interpretation.
2. End‑to‑End Traceability – Every action is recorded and linked to tool outputs, simplifying reviews and compliance.
3. On‑Prem Deployment – Sensitive chip designs remain within the organization’s secure environment, addressing security and IP concerns.

Collectively, these capabilities promise higher productivity, faster time‑to‑market, and the ability to tackle more advanced nodes without proportionally expanding engineering resources.

Market and Competitors Analysis

Market Context

The EDA sector is experiencing a wave of AI integration, with incumbents adding autonomous optimization tools and startups launching agentic AI environments. Analyst forecasts indicate a TAM of $23.9 B by 2030 (Bloomberg) and $32.88 B by 2032 (Persistence), underscoring strong growth driven by AI‑enabled productivity gains.

Key Incumbent Competitors

• Synopsys DSO.ai – The industry’s first autonomous AI application for chip design, using reinforcement learning to optimize power, performance, and area. Adoption case studies (e.g., Renesas) demonstrate measurable productivity breakthroughs. Sources: Synopsys news release and product page.
• Cadence Cerebrus – An AI‑based “Intelligent Chip Explorer” that has delivered die‑area reductions (5% at MediaTek) and power savings (>6%) while improving timing slack for Renesas designs. These results show concrete PPA benefits.
• Siemens Solido – An AI‑powered design environment for SPICE‑level variation analysis, claiming 1,000× acceleration over brute‑force methods and widespread use across thousands of designers.

Emerging Start‑ups

• ChipAgents – Provides an agentic AI chip design environment that promises 10× faster iteration in design and verification, positioning itself as a “copilot” for developers.
• Visibl (self) – Differentiates by offering an on‑prem AI IDE that aggregates context across the entire flow rather than focusing on a single tool, targeting security‑sensitive teams and emphasizing traceability.

Competitive Advantages & Risks

Visibl’s strengths include its on‑prem deployment model, comprehensive context ingestion, and focus on end‑to‑end workflow orchestration. Risks stem from the entrenched relationships of incumbents, the rapid evolution of AI‑enabled point‑tool solutions (DSO.ai, Cerebrus, Solido), and the challenge of demonstrating net‑new value beyond existing AI offerings.

Outlook

The industry trend is shifting from isolated AI enhancements within individual tools toward flow‑wide AI agents that act on a digital twin of the design process. Visibl’s positioning as a cross‑tool AI IDE aligns with this trajectory, potentially offering a differentiated value proposition as the market continues to adopt AI‑driven productivity layers.

Founders and Background

Visibl Semiconductors was founded by Bryce Neil (Co‑Founder & CEO) and Jordon Kashanchi (Co‑Founder & CTO). Bryce Neil is a computer engineer with a history of building production software and data systems for Deloitte Omnia AI, healthcare, and public‑sector projects. He has been recognized with two of Canada’s most competitive academic scholarships, underscoring a strong academic foundation.

Jordon Kashanchi brings extensive hardware and AI experience from prior roles at Microsoft, Arm, and Intel. At Microsoft he worked on digital logic and micro‑architecture for next‑generation custom AI silicon. He holds an M.S. in Electrical and Computer Engineering from the University of Texas at Austin and has published research in PNAS and ACM on wearable biosensors.

Both founders are alumni of Y Combinator, which lists their bios and highlights their combined expertise across leading semiconductor and AI companies. Crunchbase corroborates the leadership details and notes that Visibl is headquartered in the San Francisco Bay Area and backed by Y Combinator.

The company’s public website emphasizes that the founding team’s experience spans Microsoft, Intel, Arm, Deloitte Omnia AI, and other high‑impact technology organizations, positioning them to address the complex challenges of modern chip design.